520.216 - Spring 2012 -

Introduction to Very Large Scale Integration (VLSI)

Lecture Notes and Tutorial Problem Sets

Week 1 (1/31)

Handout 1. Introduction to VLSI systems (pdf); Handout 2. Basics of information and information processing (pdf)

Reading Assignments: Cramming more components onto integrated circuits (G. Moore 1965), Science in an Exponential World (Szalay and Gray 2006). A good introduction to the course can also be found in Sicard/Delmas-Bendhia Chapter 1, Sections 1.1 to 1.7

Tutorial problems: Problem set 1 (pdf) and solutions 1 (pdf)

Week 2 (2/7)

Handout 3. The digital abstraction, voltage based encoding, noise and noise margins (pdf)

Tutorial problems: Problem set 2 (pdf) and solutions 2 (pdf)

Week 3 (2/14, Quiz 1: Tutorial sets 1-2)

Handout 4. Combinational logic (pdf); Handout 5. NMOS, CMOS and combinational logic circuits (pdf)

Reading assignment: CMOS fabrication is discussed in Sicard/Delmas-Bendhia Chapter 2, Sections 2.1 to 2.4. The basic structure of a CMOS gate (NAND gate) is discussed in Chapter 6, Sections 6.1, 6.2, 6.3, 6.4.1, 6.4.

Tutorial problems: Problem set 3 (pdf) and solutions 3 (pdf)

Week 4 (2/21)

Handout 6.CMOS fabrication (video) and modeling (pdf)

Reading assignment: The abstraction of an MOS transistor is discused in Sicard/Delmas-Bendhia Chapter 2, Sections 2.5. 2.8 and 2.9.

Tutorial problems: Problem set 4 (pdf) and solutions 4 (pdf); Tutorial problems: Problem set 5 (pdf) and solutions 5 (pdf)

Week 5 (2/28, Quiz 2: Tutorial sets 3-4)

Handout 7. Sequential Logic (pdf); Handout 8. Finite State Machines, synchronization, metastability (pdf)

Reading assignment:Ward and Halstead Chapter 4, Sequences and State, sections 4.1 to 4.7. The basis of sequential logic circuits is also briefly discussed in Sicard/Delmas-Bendhia Chapter 8, sections 8.1 to 8.4. Finite state machines are in Ward and Halstead Chapter 6, sections 6.1-6. Applications of sequential logic in counters and dividers in Sicard/Delmas-Bendhia Chapter 8, Section 8.5 to 8.7; Finite State Machines handout (pdf), Sequencial structures handout (pdf)

Tutorial problems: Problem set 6 (pdf) and solutions 6 (pdf); Tutorial problems: Problem set 7 (pdf) and solutions 7 (pdf)

Week 6 (3/6)

Handout 9. Introduction to asynchronous circuits (pdf), asynchronous circuit synthesis (pdf); Handout 10. Storage hierarchy, performance and costs (pdf)

Tutorial problems: Problem set 8 (pdf) and solutions 8 (pdf)

Week 7 (3/13, Quiz 3: Tutorial sets 5-7)

Handout 11. Parallel processing, pipelining and Amdahl's law (pdf); Handout 12. Performance metrics, optimization of at the circuit level -sizing transistors for optimum delay and energy- (pdf)

Tutorial problems: Problem set 9 (pdf) and solutions 9 (pdf)

Spring Break

Week 8 (3/27)

Handout 13. Interconnect technologies (pdf); Handout 14. Beyond Amdahl's law. Architecture exploration and performance metrics at the system level -sizing microarchitectural components for optimum delay and energy- (pdf).

Reading assignment: Reading assignment: Cassidy and Andreou, Beyond Amdahl's law: An objective function that links multiprocessor performance gains to delay and energy. IEEE Transactions on Computers (pdf)

Benini and De Micheli. Networks on chips: a new System On Chip (SOC) paradigm. Computer (2002) vol. 35 (1) pp. 70 - 78 (pdf)

Tutorial problems: Problem set 10 (pdf) and solutions 10 (pdf)

Week 9 (4/3 Quiz 4: Tutorial sets 8-9)

Handout 15. Programmability and models of computation (pdf); Handout 16. Project description and discussion: an ultra low power digital neuron processor (pdf)

Reading assignment: Interpretation in Ward and Halstead Chapter 10; Models of computation handout (pdf); Dynamic digital silicon neurons (pdf)

Week 10 (4/10)

Project discussion in groups and with TA

Week 11 (4/17)

Handout 17. Analog VLSI Basic Circuits (pdf); Handout 18. Emerging models of computation:: Bio-inspired analog VLSI and event based architectures (pdf)

Week 12 (4/24)

Handout 19. General purpose processor instruction set design (pdf); Handout 20. Simple processor design (pdf); Handout 21. Parallel processing: Single Instruction Multiple Data (SIMD) architecture (pdf)

Reading assignment: Architectural horizons Ward and Halstead Chapter 21; Processor taxonomy handout (pdf)

Flynn. Some Computer Organizations and Their Effectiveness. IEEE Transactions on Computers (1972) vol. C-21 (9) pp. 948 - 960 (pdf)

Kapasi et al. Programmable stream processors. Computer (2003) vol. 36 (8) pp. 54 - 62 (pdf)

Week 13 (5/1)

Project discussion and project progress report (Tuesday); Project class presentation (Thursday)